Digital Circuits
1. Digital clock connections (being very aggressive signals) should be the first ‘nets’ to be routed, and they should be run on a single PCB layer adjacent to a ground plane.
2. All clock/address/data bus connections should be as short and direct as possible with adjacent ground guard tracks or ground planes (Figure 1). Avoid using wires, stubs, or ribbon cables to distribute clock signals.
3. High-speed digital signals, such as data, address, and control lines of microprocessors, should be grouped together and located as far from the T/0 connector as possible.
4. Always route signal tracks and their associated ground returns as close to one another as possible to minimize the area (loop) enclosed by current flow (Figure 2).
Figure 2. Resistance and Inductance as Functions of Frequency
5. Avoid running any traces other than ground next to/under crystals or any other inherently noisy circuits.
6. Keep oscillators and clock-generating ICs away from I/O connectors and close to the chips they service, to keep the loop area small.
7. Always choose the lowest clock frequency and slowest rise and fall time for digital signals that meet system requirements.
8. All critical nets, such as clocks, data strobes, etc., should be routed manually adjacent to ground tracks or ground planes.
9. Place crystals or resonators as close as physically possible to the device they service, and ideally on the same side of the PCB. Minimize the track length between the oscillator and the IC (Figure 3).
Figure 3. Crystal and Oscillator placement
10. Placing RF filters ahead of such components as diodes, transistors, or integrated circuits may prevent the RF from being converted to DC or low-frequency disturbance signals.
11. Using terminators for traces whose length exceeds twice the signal rise time may prevent reflections at either end of a transmission line.
12. For long buses, keep high-speed traces separated from low-speed signals by adding extra spacing between the high-speed and low-speed signals, and by running high-frequency signals next to a ground trace.
13. All differential signal lines should be routed adjacent to one another to take full advantage of magnetic field cancellation. Place ground guard traces on both sides of the entire length of the differential-pair signals.
14. Routing signal tracks perpendicular (90 ̊) to each other on adjacent layers of a printed circuit board may help to minimize cross-talk.
15. Controlling the rise and fall times, the duty cycle, and the fundamental frequency of switched signals may help to minimize harmonic generation.
16. All unused IC inputs should be terminated to prevent unintentional random switching and noise generation ñ i.e. unterminated CMOS inputs tend to self-bias into a linear region of operation, significantly increasing the DC current drawn. Consult IC manufacturer for recommendations.
17. Provide good ground imaging for long traces and high-speed signals.
18. Keep high-speed traces away from the edge of a PCB.
Analog Circuits
1. Analog or peripheral circuitry should be located as close to the I/O connector as possible, and be kept away from high-speed digital, high current, or power switching circuits.
2. Routing of low voltage level analog signals should be confined to the analog section of PCB only.
3. Low pass filtering should always be used on all analog inputs.
4. Printed circuit board traces which terminate at the device connector should be decoupled of RF at the connector.
5. Ground guard tracks should always be routed adjacent to analog signals. Attach the guard tracks at both ends with vias to sending and receiving circuits’ ground.
6. If using a suppression device across coils of relays and/or solenoids the suppressor should be placed as close to the coil terminals as possible.
7. If a PWM signal is used to drive a solenoid, resistor suppression may be used. This will prevent a high rate of change of current (di/dt), which can cause excessive magnetic field radiation.
8. Biasing resistors when placed as close as physically possible to the base of transistors may prevent RF from coupling in and turning the transistor on or off. (Figure 4)
9. Base and emitter bypass capacitors should be located very close to transistors (Figure 4). They should be connected to the ground with low impedance connection to minimize inductance and loop area.
Figure 4. Transistor Circuit Routing
10. Treat every trace carrying sensitive signals (especially into high input impedance loads i.e. higher than 10 kΩ) as a receiving antenna when considering its routing.
Shielding
1. All metallic shields of a system should be interconnected and grounded. Each shield ought to have low-impedance contact with the ground in at least two places in order to prevent its noise potential from coupling to the enclosed object. An ungrounded shield’s potential will vary with conditions and location, and therefore the noise coupled to the object inside will vary also.
2. Placing a shield over the whole harness may limit radio frequency (RF) emissions from it. To reduce susceptibility and cross-talk between high-impedance lines within a wiring harness use individual shields. Since the shielding of harnesses is generally less cost-effective and more labor-intensive than other EMI suppression measures such as filtering, it should not be the first choice in EMI suppression.
3. In order to realize shielding effectiveness, the shield ought to completely enclose the electronics eliminating any penetrations such as holes, seams, slots, or cables. Any penetrations in the shield unless properly treated, may drastically reduce the effectiveness of the shield.
4. Shields for low-frequency signals (below 10 MHz) should be terminated and grounded only at the source, thus preventing undesirable ground loops (Figure 5).
Figure 5 – signal ground shielding at the source
5. Shields for frequency signals (above 10 MHz) should be terminated and grounded at both ends (Figure 6).
Figure 6 – Signal ground shielding at both ends.
6. Using twisted-pair wiring to the load should avoid the creation of loop antennas that can radiate magnetic fields.
7. When routing a wire harness along sheet metal keep it away from any openings as much as possible. Openings may act as slot antennas.
8. Keep the wire harnesses at least 5 inches away from electric field sources such as distributors and magnetic field sources such as alternators and solenoids.
9. The exposed (unshielded) end of a shielded cable near a connector or a terminal should not exceed 10 mm in length.
10. Always try to minimize the length of the wire harness to reduce coupling and pickup.
11. Use twisted pair for sensitive low-frequency signals (below 1.0 MHz) and for circuits with impedances less than 1.0 kΩ to provide accurate reference voltages.
Miscellaneous
1. All unused multipurpose Integrated Circuit (IC) ports should be configured as outputs to prevent unintentional random state switching and noise generation i.e. unterminated CMOS inputs tend to self-bias into the linear region of operation, thus significantly increasing DC current draw. Use appropriate pull-up or pull-down discrete components. Consult the IC manufacturer for a recommendation.
2. Software may be used to disable (turn off) all unused clock outputs from an IC. Consult the IC manufacturer for a recommendation.
3. Reducing output buffer drive from ICs may reduce radiated emissions. Consult IC manufacturer for recommendations.
4. All output drivers should be protected against flyback transients from inductive loads.
5. ESD-sensitive devices should never be located close to I/O connectors or any other accessible openings where they may be damaged by an ESD event.
6. Keep ribbon cables and jumper strips away from ICs and oscillator circuits. Routing over or near ICs should be avoided at all costs (Figure 7).
Figure 7. Packaging Considerations Affecting RE and CE
7. When attaching ribbon cables to PCB always provide multiple ground returns to minimize loop area (Figure 8).
Figure 8. Multiple ground returns for cable
8. Critical signals should never be placed on the outside conductors of shielded ribbon cables (Figure 8).
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